Product Features:
Frequency range : 1MHz-850MHz
Frequency resolution : 1Hz
64CH memory
compact size
Business Terms:
Port: Tokyo
Minimum Order Quantity: 1 Piece/Pieces
Supply Ability: 1000 Piece/Pieces per Month
Payment Terms: T/T
Contact Supplier
Frequency range : 1MHz-850MHz
Frequency resolution : 1Hz
64CH memory
compact size
Port: Tokyo
Minimum Order Quantity: 1 Piece/Pieces
Supply Ability: 1000 Piece/Pieces per Month
Payment Terms: T/T
Contact Supplier
Packaging Detail: export standard packing(carton box)
Delivery Detail: 4-5 weeks after receipt of your firm order and payment
PCL-850 is wide band clock source utilizing Direct Digital Synthesis and Phase Locked Loop technique. It provides any frequency output from 1MHz to 850MHz in 1Hz step. The frequency can be controlled by parallel data such as DIP SW or serial data which can be connected to PC communication port.
Another features
Single power supply +3.3V
Frequency controlled by parallel and serial data
Frequency memorized into EEPROM in spite of ON/OFF setting
Low jitter
Memory can be selected by parallel data channel
Specification
Power supply : 3.3V +/- 5%, 250mA
Frequency range : 1,000,000Hz-850,000,000Hz
Output level : 3.3V differential LVPECL output
Frequency resolution : 1Hz
Frequency accuracy : +/- 20ppm, 25 degrees C
Frequency stability : +/- 20ppm, 0-50 degrees C
Jitter : 1MHz-400MHz 30pSrms
400MHz-850MHz 50pSrms(cycle to cycle)
Spurious : 1MHz-400MHz more than -45dB
400MHz-850MHz more than -32dB
Non-Voltile memory save times : more than 10,000
Frequency control : parallel input 7 bits control lines
6 bit memory CH selection lines
1 bit strobe signal
serial input, 2 wires
9600 BPS, 8 bit, without parity
1 stop bit
ASCII 9 digit numeric data and delimitter
Frequency switching time : within 5mS(time from setting freq. data to getting signal)
Dimensions : 40x32.5x13mm
Please refer to the user's manual for more details on our original HP http://www.dst.co.jp/en/manuals/pcl850u.pdf
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